#ifndef __IPL_DISP_TRUELY_H__
#define __IPL_DISP_TRUELY_H__


#ifndef _ASIC_
#define EDC_LCD_SLAVE                        0x92200000
#else
#define EDC_LCD_SLAVE                        0x30200000
#endif

/*
 * Define the LCM panel attribution for CLCDC
 */
/*
LCDTiming0, 0x01010038
0000 0010 0000 0001 0000 0000 0011 1000
HBP = (2 - 1) = 0x01
HFP = (1 - 1) = 0
HSW = (1 - 1) = 0 
PPL = 15
    (16*(PPL + 1) = 16*(15 + 1) = 256)
*/
#define LCD_TIMING_0_HBP    ((16 - 1) << 24)    
#define LCD_TIMING_0_HFP    ((2 - 1) << 16)   
#define LCD_TIMING_0_HSW    ((4 - 1) << 8)     //HWL = 4 DOTCLK
#define LCD_TIMING_0_PPL    ((29 - 0) << 2)  /* 16*(PPL + 1) *///240

/*
LCDTiming1, 0x0100013f
0000 0001 0000 0000 0000 0001 0011 1111
VBP = 1
VFP = 0
VSW = (1 - 1)
LPP = (320 - 1) = 0x13F
*/
#define LCD_TIMING_1_VBP    ((13 - 0) << 24)
#define LCD_TIMING_1_VFP    ((8 - 0) << 16)
#define LCD_TIMING_1_VSW    ((3 - 0) << 10) // VWL >= 1 HSYNC
#define LCD_TIMING_1_LPP    ((800 - 1) << 0)

/*
LCDTiming2, 0x00EF3808
0000 0000 1110 1111 0011 1000 0000 1000
PCD_HI  = 0
BCD     = 0 // not bypass pixel clock divider
CPL     = (240 - 1)
RESERVED
IEO     = 0 // Enable is, 1 - active LOW, 0 - active HIGH
IPC     = 1 // Data is driven, 1 - on the falling edge of CLCP, 0 - on the rising edge
IHS     = 1 // Horizontal is, 1 - active LOW and inactive HIGH, 0 - active HIGH  and inactive LOW
IVS     = 1 // Vertical is, 1 - active LOW and inactive HIGH, 0 - active HIGH  and inactive LOW
ACB     = 0
CLKSEL  = 0
PCD_LO  = 8 // CLCP = CLCDCLK / (PCD + 2)
*/
#define LCD_TIMING_2_PCD_HI         0   //(0 << 27)
#define LCD_TIMING_2_BCD            (1 << 26)  //(0 << 26)
#define LCD_TIMING_2_CPL            ((480 - 1) << 16)
#define LCD_TIMING_2_RESERVED       0   //(0 << 15)   
#define LCD_TIMING_2_IEO            (0 << 14)   //(0 << 14)
#define LCD_TIMING_2_IPC            (1 << 13)
#define LCD_TIMING_2_IHS            (1 << 12)
#define LCD_TIMING_2_IVS            (1 << 11)
#define LCD_TIMING_2_ACB            0   //(0 << 6)
#define LCD_TIMING_2_CLKSEL         0   //(0 << 5)
#define LCD_TIMING_2_PCD_LO         (1 << 0)

/*
LCDTiming3, 0x0

RESERVED
LEE = 0
RESERVED
LED = 0
*/
#define LCD_TIMING_3_LEE            0   //(0 << 16)
#define LCD_TIMING_3_LED            0   //(0 << 0)

/*
LCDControl, 0x00000829
0000 0000 0000 0000 0000 1000 0010 1001

RESERVED
WATERMARK   0
RESERVED
LCDVCOMP    0
LCDPWR      1
BEPO        0
BEBO        0
BGR         0
LCDDUAL     0
LCDMONO8    0
LCDTFT      1
LCDBW       0
LCDBPP      4
LCDEN       0   //  default not enable CLCDC, this bit is controlled by clcdcSwitch function
*/
#define LCD_CONTROL_WATERMARK       0   //(0 << 16)
#define LCD_CONTROL_LCDVCOMP        (0 << 12) //(0 << 12) /* modified by huangjun */
#define LCD_CONTROL_LCDPWR          (1 << 11)
#define LCD_CONTROL_BEPO            0   //(0 << 10)
#define LCD_CONTROL_BEBO            0   //(0 << 9)
#define LCD_CONTROL_BGR             0   //(0 << 8)
#define LCD_CONTROL_LCDDUAL         0   //(0 << 7)
#define LCD_CONTROL_LCDMONO8        0   //(0 << 6)    
#define LCD_CONTROL_LCDTFT          (1 << 5)
#define LCD_CONTROL_LCDBW           0   //(0 << 4)
#define LCD_CONTROL_LCDBPP          (5 << 1)    //RGB666
#define LCD_CONTROL_LCDEN_0         0   //(0 << 0)


/*
 * Define image display informaion  
 */

#define PANEL_DISPLAY_BPP           16

#define PANEL_DISPLAY_WIDTH         480

#define PANEL_DISPLAY_HEIGHT        800



/*Define CLCDC registers setting value*/
#define VAL_CLCDC_TIMING_0      ( LCD_TIMING_0_HBP | \
                                  LCD_TIMING_0_HFP | \
                                  LCD_TIMING_0_HSW | \
                                  LCD_TIMING_0_PPL )
                                  
#define VAL_CLCDC_TIMING_1      ( LCD_TIMING_1_VBP | \
                                  LCD_TIMING_1_VFP | \
                                  LCD_TIMING_1_VSW | \
                                  LCD_TIMING_1_LPP )

#define VAL_CLCDC_TIMING_2      ( LCD_TIMING_2_PCD_HI   | \
                                  LCD_TIMING_2_BCD      | \
                                  LCD_TIMING_2_CPL      | \
                                  LCD_TIMING_2_RESERVED | \
                                  LCD_TIMING_2_IEO      | \
                                  LCD_TIMING_2_IPC      | \
                                  LCD_TIMING_2_IHS      | \
                                  LCD_TIMING_2_IVS      | \
                                  LCD_TIMING_2_ACB      | \
                                  LCD_TIMING_2_CLKSEL   | \
                                  LCD_TIMING_2_PCD_LO )

#define VAL_CLCDC_TIMING_3      ( LCD_TIMING_3_LEE | \
                                  LCD_TIMING_3_LED )

#define VAL_CLCDC_CONTROL       ( LCD_CONTROL_WATERMARK |\
                                  LCD_CONTROL_LCDVCOMP  |\
                                  LCD_CONTROL_LCDPWR    |\
                                  LCD_CONTROL_BEPO      |\
                                  LCD_CONTROL_BEBO      |\
                                  LCD_CONTROL_BGR       |\
                                  LCD_CONTROL_LCDDUAL   |\
                                  LCD_CONTROL_LCDMONO8  |\
                                  LCD_CONTROL_LCDTFT    |\
                                  LCD_CONTROL_LCDBW     |\
                                  LCD_CONTROL_LCDBPP    |\
                                  LCD_CONTROL_LCDEN_0 )

/*Define LCM display parameters*/

#define LCM_DISPLAY_BPP             PANEL_DISPLAY_BPP

#define LCM_DISPLAY_WIDTH           PANEL_DISPLAY_WIDTH

#define LCM_DISPLAY_HEIGHT          PANEL_DISPLAY_HEIGHT


static UCHAR powerOnData1[] = {0x78, 0x00, 0x20, 
                                0x78, 0x00, 0x3A,  
                                0x7A, 0x00, 0x70, 
                                0x78, 0x00, 0xB1, 
                                0x7A, 0x00, 0x16, 
                                0x7A, 0x00, 0x14, 
                                0x7A, 0x00, 0x10, 
                                0x78, 0x00, 0xB2, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0xC8, 
                                0x78, 0x00, 0xB3, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0xFF, 
                                0x78, 0x00, 0xB4, 
                                0x7A, 0x00, 0x10, 
                                0x78, 0x00, 0xB6, 
                                0x7A, 0x00, 0x08, 
                                0x7A, 0x00, 0x18, 
                                0x7A, 0x00, 0x02, 
                                0x7A, 0x00, 0x40, 
                                0x7A, 0x00, 0x10, 
                                0x78, 0x00, 0xB7, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x10, 
                                0x7A, 0x00, 0x01, 
                                0x78, 0x00, 0xC3, 
                                0x7A, 0x00, 0x04, 
                                0x7A, 0x00, 0x05, 
                                0x7A, 0x00, 0x04, 
                                0x7A, 0x00, 0x04, 
                                0x7A, 0x00, 0x01, 
                                0x78, 0x00, 0xC4, 
                                0x7A, 0x00, 0x22, 
                                0x7A, 0x00, 0x03, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x1A, 
                                0x7A, 0x00, 0x1A, 
                                0x7A, 0x00, 0x01, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x04, 
                                0x78, 0x00, 0xC5, 
                                0x7A, 0x00, 0x6C, 
                                0x7A, 0x00, 0x07, 
								0x78, 0x00, 0xC6,  
                                0x7A, 0x00, 0x23, 
                                0x78, 0x00, 0xD0, 
								0x7A, 0x00, 0x00,  
                                0x7A, 0x00, 0x43, 
                                0x7A, 0x00, 0x64, 
                                0x7A, 0x00, 0x25, 
                                0x7A, 0x00, 0x10, 
                                0x7A, 0x00, 0x02, 
                                0x7A, 0x00, 0x71, 
                                0x7A, 0x00, 0x44, 
                                0x7A, 0x00, 0x04, 
                                0x78, 0x00, 0xD1, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x43, 
                                0x7A, 0x00, 0x64, 
                                0x7A, 0x00, 0x25, 
                                0x7A, 0x00, 0x10, 
                                0x7A, 0x00, 0x02, 
                                0x7A, 0x00, 0x71, 
                                0x7A, 0x00, 0x44, 
                                0x7A, 0x00, 0x04, 
                                0x78, 0x00, 0xD2, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x43, 
                                0x7A, 0x00, 0x64, 
                                0x7A, 0x00, 0x25, 
                                0x7A, 0x00, 0x10, 
                                0x7A, 0x00, 0x02, 
                                0x7A, 0x00, 0x71, 
                                0x7A, 0x00, 0x44, 
                                0x7A, 0x00, 0x04, 
                                0x78, 0x00, 0xD3, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x43, 
                                0x7A, 0x00, 0x64, 
                                0x7A, 0x00, 0x25, 
                                0x7A, 0x00, 0x10, 
                                0x7A, 0x00, 0x02, 
                                0x7A, 0x00, 0x71, 
                                0x7A, 0x00, 0x44, 
                                0x7A, 0x00, 0x04, 
                                0x78, 0x00, 0xC2, 
                                0x7A, 0x00, 0x08  
                               }; 
                               

//wait 20ms
static UCHAR powerOnData2[] ={ 0x78, 0x00, 0xC2, 
                                0x7A, 0x00, 0x18
                               };


//wait 20ms                     
static UCHAR powerOnData3[] ={ 0x78, 0x00, 0xC2,                                
                                0x7A, 0x00, 0xB8
                              };     
//wait 20ms                               
static UCHAR powerOnData4[] ={ 0x78, 0x00, 0xB5, 
                                0x7A, 0x00, 0x01   
                               };

//wait 20ms                               
static UCHAR powerOnData5[] ={ 0x78, 0x00, 0x29}; 




//sleep on
 
static UCHAR powerOffData1[] ={ 0x78, 0x00, 0x28};  
//wait 20ms 
static UCHAR powerOffData2[] ={ 0x78, 0x00, 0xB5, 
                                0x7A, 0x00, 0x00   
                               };    
//wait 20ms  
static UCHAR powerOffData3[] ={ 0x78, 0x00, 0xC2, 
                                0x7A, 0x00, 0x18
                               };   
//wait 20ms  
static UCHAR powerOffData4[] ={ 0x78, 0x00, 0xC2,                                
                                0x7A, 0x00, 0x00
                              };  
//wait 20ms         
static UCHAR powerOffData5[] = {
                                0x78, 0x00, 0xC4, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x1A, 
                                0x7A, 0x00, 0x1A, 
                                0x7A, 0x00, 0x04, 
                                0x7A, 0x00, 0x00, 
                                0x7A, 0x00, 0x04, 
	                        }; 
//wait 20ms ???
//deep stand-by on
static UCHAR powerOffData6[] = {
                                0x78, 0x00, 0xC1, 
                                0x7A, 0x00, 0x01, 
	                            };


  

#endif                                                                    
              